Abstract:In this paper, Radix24 algorithm of FFT is introduced,which is realized by using hardware of FPGA ( Field Programmable Gate Array). Structure that two butterfly arithmetic unit compute parallel and simultaneity is given, and butterfly arithmetic acts sequentially every time. In this structure, pairing processing and sequential processing are associated. This app roach can imp rove parallelism and throughput. Each butterfly arithmetic time is notmore than 5μs,and the whole 256 dot plural FFT arithmetic need about 120μs. At the same time source is saved. When it is applied in position following system ofmine hoist, nicer effect is obtained.