IRFPA with region of interest is researched and specific integral time signal is designed,which not only rises frame rate greatly,but also realizes outputs of two different frame rate image at the same time at the cost of the loss of real time.One of two different frame rate image is lower frame rate and is used to display,the other is higher frame rate and is transmitted to tracker which makes tracking arithmetic process.This project is realized at the hardware plat of FPGA+DSP and is proved to be viable,the response difference that arises from region of interest is pointed out finally.