A high responsivity APD based on 0.18 μm complementary metal-oxide-semiconductor (CMOS) process is designed. With the standard 0.18 μm CMOS technology,two P+/N-well type pn junctions are designed to form two avalanche regions in order to produce avalanche multiplication current,and the guard-ring structure is formed with STI (Shallow Trench Isolation) structure on both sides of the avalanche region,which restrains the edge-breakdown effectively. A deep N-well structure has been applied in the APD to absorb a large number of carriers before they spread to the substrate,which screened the excessed noise and improved the responsivity of the device. Though theoretical analysis,the optical window area is 10 μm×10 μm,other structure and process parameters of the CMOS-APD are also confirmed. The simulation results show that at wavelength of 480 nm,the quantum efficiency reaches up to 90%. The avalanche gain is about 72,the responsivity is 2.96 A/W and 3 dB bandwidth is about 4.8 GHz when the bias voltage is -15 V.