In the test of large-scale TDI line-array readout circuit,it is generally found that the set-up time is insufficient,and there is a big difference between the test result and the simulation result.The readout circuit has fully considered the influence of the IR drop,the parasitic and other loads effects in the design and simulation.However,in the test,it is found that the actual circuit set-up time is twice as long as the simulation set-up time,or even longer.Theoretically,the simulation results and the test results will not be much different in the case of low application frequency.In view of this phenomenon,through a large number of experiments and simulation verification,the paper finally determined that the place and route of circuit′s output block cause the problem.By optimizing the layout,the set-up time of TDI line-array readout circuit can be improved to 1.38 V/30 ns.